[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/fsp_broadwell_de: Fix TSEG size computation

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30932 )

Change subject: soc/intel/fsp_broadwell_de: Fix TSEG size computation
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Patch Set 1: Code-Review+2

(1 comment)

https://review.coreboot.org/#/c/30932/1/src/soc/intel/fsp_broadwell_de/smmre... 
File src/soc/intel/fsp_broadwell_de/smmrelocate.c:

https://review.coreboot.org/#/c/30932/1/src/soc/intel/fsp_broadwell_de/smmre... 
PS1, Line 229: + 1 * MiB;
> It's explained in the commit message and the comment above. […]

ok. it still might be a good check for the SMRR alignment requirements before setting those parameters in general, but that is besides the scope of this patch.