[coreboot-gerrit] Change in coreboot[master]: mb/ocp/tiogapass: correct "POST complete" pad initial value

[Michael Niewöhner (Code Review)]

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48670 )

Change subject: mb/ocp/tiogapass: correct "POST complete" pad initial value
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mb/ocp/tiogapass: correct "POST complete" pad initial value

On OCP Tioga Pass the pad GPP_B20 is used as output for signalling "POST
complete" to the BMC. According to the schematics and the code in
`ramstage.c`, the signal is active-low. There is an external pull-up
resistor.

To make the signalling work as it should, set the initial output value
to `high`.

Change-Id: I82fbda1caba9163ba3b2e38f494a0cefa27e657f
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48670
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h b/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h
index 97ab7cb..59ab3e7 100644
--- a/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h
+++ b/src/mainboard/ocp/tiogapass/include/tp_pch_gpio.h
@@ -99,7 +99,7 @@
    /* GPP_B19 - GPIO */
    PAD_CFG_GPO(GPP_B19, 1, DEEP),
    /* GPP_B20 - GPIO */
-	PAD_CFG_GPO(GPP_B20, 0, DEEP),
+	PAD_CFG_GPO(GPP_B20, 1, DEEP),
    /* GPP_B21 - GPIO */
    PAD_CFG_GPI_TRIG_OWN(GPP_B21, NONE, DEEP, OFF, DRIVER),
    /* GPP_B22 - GPIO */