Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43303 )
Change subject: soc/amd/common: Use SPI settings from Kconfig options ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43303/1/src/soc/amd/common/block/sp... File src/soc/amd/common/block/spi/fch_spi.c:
https://review.coreboot.org/c/coreboot/+/43303/1/src/soc/amd/common/block/sp... PS1, Line 52: uint8_t spi_speed = 0xff; I was actually thinking that coreboot can read out these values from EFS. That allows us to configure the SPI settings in one place. With that, we can also ensure that em100 works correctly even with PSP using the configuration from EFS.
Kconfigs --> Use AMDFWTOOL to configure the SPI settings correctly in EFS --> SPI speed can be overwritten in a generated EFS for special modes like em100.
PSP --> Uses EFS SPI settings to configure the SPI mode/speed coreboot --> Uses EFS SPI settings to configure the SPI mode/speed
Thus, if em100 is being used, only change required would be to set the EFS fields differently without even having to re-build the entire image.