Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34204 )
Change subject: [WIP] arch/x86: Use udelay() from monotonic timer ......................................................................
[WIP] arch/x86: Use udelay() from monotonic timer
Change-Id: I2e768346b21758a386064346aff2ee8592a8e991 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/Kconfig M src/cpu/amd/agesa/Kconfig M src/cpu/amd/family_10h-family_15h/Kconfig M src/cpu/amd/pi/00630F01/fixme.c M src/cpu/amd/pi/00660F01/fixme.c M src/cpu/amd/pi/00730F01/fixme.c M src/cpu/amd/pi/Kconfig M src/cpu/intel/fsp_model_406dx/Kconfig M src/cpu/intel/haswell/Kconfig M src/cpu/intel/model_1067x/Kconfig M src/cpu/intel/model_106cx/Kconfig M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_6ex/Kconfig M src/cpu/intel/model_6fx/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/qemu-x86/Kconfig M src/cpu/via/nano/Kconfig M src/cpu/x86/Kconfig M src/cpu/x86/lapic/Makefile.inc M src/cpu/x86/lapic/apic_timer.c M src/cpu/x86/tsc/Makefile.inc M src/cpu/x86/tsc/delay_tsc.c M src/soc/amd/stoneyridge/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/fsp_baytrail/Kconfig M src/soc/intel/fsp_broadwell_de/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/quark/Kconfig M src/soc/intel/skylake/Kconfig 35 files changed, 15 insertions(+), 100 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/34204/1
diff --git a/src/Kconfig b/src/Kconfig index ec0f35b..4a879e3 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -514,7 +514,7 @@ config GENERIC_UDELAY bool depends on HAVE_MONOTONIC_TIMER - default y if !ARCH_X86 + default y help The board/chipset uses a generic udelay function utilizing the monotonic timer. diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index 4c5463c..2b8a8c7 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -26,7 +26,6 @@ select ARCH_RAMSTAGE_X86_32 select DRIVERS_AMD_PI select TSC_SYNC_LFENCE - select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER select SPI_FLASH if HAVE_ACPI_RESUME select POSTCAR_STAGE diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig index df65499..98be6f6 100644 --- a/src/cpu/amd/family_10h-family_15h/Kconfig +++ b/src/cpu/amd/family_10h-family_15h/Kconfig @@ -6,7 +6,6 @@ select ARCH_RAMSTAGE_X86_32 select SSE2 select TSC_SYNC_LFENCE - select UDELAY_LAPIC select SUPPORT_CPU_UCODE_IN_CBFS select CPU_MICROCODE_MULTIPLE_FILES select ACPI_HUGE_LOWMEM_BACKUP diff --git a/src/cpu/amd/pi/00630F01/fixme.c b/src/cpu/amd/pi/00630F01/fixme.c index 10fd9f5..1923b08 100644 --- a/src/cpu/amd/pi/00630F01/fixme.c +++ b/src/cpu/amd/pi/00630F01/fixme.c @@ -88,7 +88,7 @@ MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull; LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader);
- if (CONFIG(UDELAY_LAPIC)){ + if (CONFIG(LAPIC_MONOTONIC_TIMER)) { LibAmdMsrRead(0x1B, &MsrReg, &StdHeader); MsrReg |= 1 << 11; LibAmdMsrWrite(0x1B, &MsrReg, &StdHeader); diff --git a/src/cpu/amd/pi/00660F01/fixme.c b/src/cpu/amd/pi/00660F01/fixme.c index 2cbeab8..b4719a3 100644 --- a/src/cpu/amd/pi/00660F01/fixme.c +++ b/src/cpu/amd/pi/00660F01/fixme.c @@ -94,7 +94,7 @@ MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull; LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader);
- if (CONFIG(UDELAY_LAPIC)) { + if (CONFIG(LAPIC_MONOTONIC_TIMER)) { LibAmdMsrRead(0x1B, &MsrReg, &StdHeader); MsrReg |= 1 << 11; LibAmdMsrWrite(0x1B, &MsrReg, &StdHeader); diff --git a/src/cpu/amd/pi/00730F01/fixme.c b/src/cpu/amd/pi/00730F01/fixme.c index 3769319..761c716 100644 --- a/src/cpu/amd/pi/00730F01/fixme.c +++ b/src/cpu/amd/pi/00730F01/fixme.c @@ -99,7 +99,7 @@ MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | 0x800ull; LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader);
- if (CONFIG(UDELAY_LAPIC)) { + if (CONFIG(LAPIC_MONOTONIC_TIMER)) { LibAmdMsrRead(0x1B, &MsrReg, &StdHeader); MsrReg |= 1 << 11; LibAmdMsrWrite(0x1B, &MsrReg, &StdHeader); diff --git a/src/cpu/amd/pi/Kconfig b/src/cpu/amd/pi/Kconfig index a902089..099f54c 100644 --- a/src/cpu/amd/pi/Kconfig +++ b/src/cpu/amd/pi/Kconfig @@ -25,7 +25,6 @@ select ARCH_RAMSTAGE_X86_32 select DRIVERS_AMD_PI select TSC_SYNC_LFENCE - select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER select SPI_FLASH if HAVE_ACPI_RESUME select POSTCAR_STAGE if !BINARYPI_LEGACY_WRAPPER diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index 8649777..0aab0a2 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -28,7 +28,6 @@ select SMP select MMX select SSE2 - select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_NOT_IN_BLOB_REPO select PARALLEL_CPU_INIT diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index d8d8b97..84a2241 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -13,7 +13,6 @@ select SMP select MMX select SSE2 - select UDELAY_TSC select TSC_MONOTONIC_TIMER select SUPPORT_CPU_UCODE_IN_CBFS #select AP_IN_SIPI_WAIT diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 0c74c69..cdf7991 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -6,7 +6,6 @@ select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 - select UDELAY_TSC select TSC_SYNC_MFENCE select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_COMMON diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index dbfda01..2f22bed 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -6,7 +6,6 @@ select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 - select UDELAY_TSC select SIPI_VECTOR_IN_ROM select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index f098526..6c65907 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -11,7 +11,6 @@ select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 - select UDELAY_TSC select TSC_MONOTONIC_TIMER select SUPPORT_CPU_UCODE_IN_CBFS select PARALLEL_CPU_INIT diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 72f04da..4ed1119 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -12,7 +12,6 @@ select SMP select MMX select SSE2 - select UDELAY_TSC select TSC_MONOTONIC_TIMER select SUPPORT_CPU_UCODE_IN_CBFS #select AP_IN_SIPI_WAIT diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index 29ef306..c06922b 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -6,7 +6,6 @@ select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 - select UDELAY_TSC select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index df67f51..3b58463 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -6,7 +6,6 @@ select ARCH_RAMSTAGE_X86_32 select SMP select SSE2 - select UDELAY_TSC select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index a2ebeb2..e4dcba3 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -8,7 +8,6 @@ select CPU_INTEL_MODEL_F2X select MMX select SSE - select UDELAY_TSC select TSC_MONOTONIC_TIMER select SIPI_VECTOR_IN_ROM select C_ENVIRONMENT_BOOTBLOCK diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index d586125..9385684 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -20,7 +20,6 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select SMP - select UDELAY_TSC select TSC_MONOTONIC_TIMER select C_ENVIRONMENT_BOOTBLOCK select SMM_ASEG diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig index aeb81ac..ad1f612 100644 --- a/src/cpu/via/nano/Kconfig +++ b/src/cpu/via/nano/Kconfig @@ -25,7 +25,6 @@ select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select UDELAY_TSC select TSC_MONOTONIC_TIMER select MMX select SSE2 diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 24dc1f4..0bf2f0d 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -17,26 +17,16 @@ Allow APs to do other work after initialization instead of going to sleep.
-config UDELAY_LAPIC - bool - default n - config LAPIC_MONOTONIC_TIMER def_bool n - depends on UDELAY_LAPIC help Expose monotonic time using the local APIC.
config UDELAY_LAPIC_FIXED_FSB int
-config UDELAY_TSC - bool - default n - config TSC_MONOTONIC_TIMER def_bool n - depends on UDELAY_TSC help Expose monotonic time using the TSC.
diff --git a/src/cpu/x86/lapic/Makefile.inc b/src/cpu/x86/lapic/Makefile.inc index 9454f8f..058e25b 100644 --- a/src/cpu/x86/lapic/Makefile.inc +++ b/src/cpu/x86/lapic/Makefile.inc @@ -1,9 +1,9 @@ ramstage-y += lapic.c ramstage-y += lapic_cpu_init.c ramstage-$(CONFIG_SMP) += secondary.S -romstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c -ramstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c -postcar-$(CONFIG_UDELAY_LAPIC) += apic_timer.c +romstage-$(CONFIG_LAPIC_MONOTONIC_TIMER) += apic_timer.c +ramstage-$(CONFIG_LAPIC_MONOTONIC_TIMER) += apic_timer.c +postcar-$(CONFIG_LAPIC_MONOTONIC_TIMER) += apic_timer.c bootblock-y += boot_cpu.c verstage-y += boot_cpu.c romstage-y += boot_cpu.c diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c index 2e0583b..639a89a 100644 --- a/src/cpu/x86/lapic/apic_timer.c +++ b/src/cpu/x86/lapic/apic_timer.c @@ -22,6 +22,7 @@ #include <arch/early_variables.h> #include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> +#include <timer.h>
void init_timer(void) { @@ -38,33 +39,6 @@ set_timer_fsb(); }
-void udelay(u32 usecs) -{ - u32 start, value, ticks, timer_fsb; - - if (!thread_yield_microseconds(usecs)) - return; - - timer_fsb = get_timer_fsb(); - if (!timer_fsb || (lapic_read(LAPIC_LVTT) & - (LAPIC_LVT_TIMER_PERIODIC | LAPIC_LVT_MASKED)) != - (LAPIC_LVT_TIMER_PERIODIC | LAPIC_LVT_MASKED)) { - init_timer(); - timer_fsb = get_timer_fsb(); - } - - /* Calculate the number of ticks to run, our FSB runs at timer_fsb Mhz - */ - ticks = usecs * timer_fsb; - start = lapic_read(LAPIC_TMCCT); - do { - value = lapic_read(LAPIC_TMCCT); - } while ((start - value) < ticks); -} - -#if CONFIG(LAPIC_MONOTONIC_TIMER) -#include <timer.h> - static struct monotonic_counter { int initialized; struct mono_time time; @@ -108,4 +82,3 @@ /* Save result. */ *mt = mono_counter->time; } -#endif diff --git a/src/cpu/x86/tsc/Makefile.inc b/src/cpu/x86/tsc/Makefile.inc index b3925b5..592acb3 100644 --- a/src/cpu/x86/tsc/Makefile.inc +++ b/src/cpu/x86/tsc/Makefile.inc @@ -1,6 +1,6 @@ -bootblock-$(CONFIG_UDELAY_TSC) += delay_tsc.c -ramstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c -romstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c -verstage-$(CONFIG_UDELAY_TSC) += delay_tsc.c -postcar-$(CONFIG_UDELAY_TSC) += delay_tsc.c -smm-$(CONFIG_UDELAY_TSC) += delay_tsc.c +bootblock-$(CONFIG_TSC_MONOTONIC_TIMER) += delay_tsc.c +ramstage-$(CONFIG_TSC_MONOTONIC_TIMER) += delay_tsc.c +romstage-$(CONFIG_TSC_MONOTONIC_TIMER) += delay_tsc.c +verstage-$(CONFIG_TSC_MONOTONIC_TIMER) += delay_tsc.c +postcar-$(CONFIG_TSC_MONOTONIC_TIMER) += delay_tsc.c +smm-$(CONFIG_TSC_MONOTONIC_TIMER) += delay_tsc.c diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index 515919a..7789c7a 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -16,6 +16,7 @@ #include <smp/spinlock.h> #include <delay.h> #include <thread.h> +#include <timer.h>
static unsigned long clocks_per_usec CAR_GLOBAL;
@@ -31,28 +32,6 @@ return car_get_var(clocks_per_usec); }
-void udelay(unsigned int us) -{ - unsigned long long start; - unsigned long long current; - unsigned long long clocks; - - if (!thread_yield_microseconds(us)) - return; - - start = rdtscll(); - clocks = us; - clocks *= get_clocks_per_usec(); - current = rdtscll(); - while ((current - start) < clocks) { - cpu_relax(); - current = rdtscll(); - } -} - -#if CONFIG(TSC_MONOTONIC_TIMER) -#include <timer.h> - static struct monotonic_counter { int initialized; struct mono_time time; @@ -94,4 +73,3 @@ /* Save result. */ *mt = mono_counter->time; } -#endif diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 78b89e3..465df60 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -36,7 +36,6 @@ select COLLECT_TIMESTAMPS_NO_TSC select DRIVERS_I2C_DESIGNWARE select GENERIC_GPIO_LIB - select GENERIC_UDELAY select IOAPIC select HAVE_USBDEBUG_OPTIONS select SPI_FLASH if HAVE_ACPI_RESUME diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 36b3b82..04cfef1 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -98,7 +98,6 @@ select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SPI select SOC_INTEL_COMMON_BLOCK_CSE - select UDELAY_TSC select TSC_MONOTONIC_TIMER select PLATFORM_USES_FSP2_0 select UDK_2015_BINDING if !SOC_INTEL_GLK diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 251f4fb..46ef898 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -29,7 +29,6 @@ select SSE2 select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE - select UDELAY_TSC select SOC_INTEL_COMMON select INTEL_DESCRIPTOR_MODE_CAPABLE select HAVE_SPI_CONSOLE_SUPPORT diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index a33ac2f..5d2a776 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -38,7 +38,6 @@ select SSE2 select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE - select UDELAY_TSC select USE_GENERIC_FSP_CAR_INC select INTEL_DESCRIPTOR_MODE_CAPABLE select HAVE_SPI_CONSOLE_SUPPORT diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 4b59aaa..6bec847 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -29,7 +29,6 @@ select SPI_FLASH select SSE2 select TSC_SYNC_MFENCE - select UDELAY_TSC select SOC_INTEL_COMMON select INTEL_DESCRIPTOR_MODE_CAPABLE select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index cc502f9..4750c6b 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -103,7 +103,6 @@ select SSE2 select SUPPORT_CPU_UCODE_IN_CBFS select TSC_MONOTONIC_TIMER - select UDELAY_TSC select UDK_2017_BINDING select DISPLAY_FSP_VERSION_INFO select FSP_T_XIP if FSP_CAR diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index bee6e88..3bf608e 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -54,7 +54,6 @@ select SOC_INTEL_COMMON_BLOCK_PCR select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE - select UDELAY_TSC select UDK_2015_BINDING select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index b0da459..38777c5 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -37,7 +37,6 @@ select SPI_FLASH select SSE2 select TSC_SYNC_MFENCE - select UDELAY_TSC select TSC_MONOTONIC_TIMER select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_NOT_HOOKED_UP diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index 8e301df..38c7941 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -18,7 +18,6 @@ select PARALLEL_MP select SMP select IOAPIC - select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS select INTEL_DESCRIPTOR_MODE_CAPABLE select HAVE_SMI_HANDLER diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index ad80abc..b9dce1e 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -56,7 +56,6 @@ select SSE2 select SUPPORT_CPU_UCODE_IN_CBFS select TSC_MONOTONIC_TIMER - select UDELAY_TSC select UDK_2017_BINDING select DISPLAY_FSP_VERSION_INFO select HECI_DISABLE_USING_SMM diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index bb73780..ee2e791 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -34,7 +34,6 @@ select SOC_SETS_MSRS select SPI_FLASH select UART_OVERRIDE_REFCLK - select UDELAY_TSC select UNCOMPRESSED_RAMSTAGE select USE_MARCH_586
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 04c8bd9..3d7a530 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -76,7 +76,6 @@ select SUPPORT_CPU_UCODE_IN_CBFS select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE - select UDELAY_TSC
config CPU_INTEL_NUM_FIT_ENTRIES int