[coreboot-gerrit] Change in coreboot[master]: soc/intel/braswell: Use common sb code for SPI lockdown configuration

[Frans Hendriks (Code Review)]

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36007 )

Change subject: soc/intel/braswell: Use common sb code for SPI lockdown configuration
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Patch Set 3:
> Patch Set 3:
> > Patch Set 3:
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> > (1 comment)
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> Using your patch fbg1701 reported 'Transaction error' when MRC cache data needs update.

I noticed that spi_flash_generic_probe() does not detect the winbond anymore. This is cause of the transaction error.