[coreboot-gerrit] [XS] Change in coreboot[main]: device/dram/ddr5: Add 7500 MT/s support

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86543?usp=email )

Change subject: device/dram/ddr5: Add 7500 MT/s support
......................................................................

device/dram/ddr5: Add 7500 MT/s support

Before I got the following error:
[ERROR]  DDR5 speed of 3750 MHz is out of range

tested: glinda based mainboard

Change-Id: I141f63c4fc505a9e16eed132a9a550441f4ad68d
Signed-off-by: Maximilian Brune 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86543
Reviewed-by: Paul Menzel 
Reviewed-by: Alicja Michalska 
Reviewed-by: Andy Ebrahiem 
Reviewed-by: Marvin Drees 
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Naresh Solanki 
---
M src/device/dram/ddr5.c
1 file changed, 6 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marvin Drees: Looks good to me, but someone else must approve
  Andy Ebrahiem: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved
  Naresh Solanki: Looks good to me, approved
  Alicja Michalska: Looks good to me, but someone else must approve
  Paul Menzel: Looks good to me, but someone else must approve

diff --git a/src/device/dram/ddr5.c b/src/device/dram/ddr5.c
index b546abf..90b67f8 100644
--- a/src/device/dram/ddr5.c
+++ b/src/device/dram/ddr5.c
@@ -21,6 +21,7 @@
    DDR5_5500,
    DDR5_6000,
    DDR5_6400,
+	DDR5_7500,
 };

struct ddr5_speed_attr {
@@ -108,6 +109,11 @@
    	.max_clock_mhz = 3200,
    	.reported_mts = 6400
    },
+	[DDR5_7500] = {
+		.min_clock_mhz = 3201,
+		.max_clock_mhz = 3750,
+		.reported_mts = 7500
+	},
 };

/**