Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33129 )
Change subject: soc/intel/cannonlake: set temperature threshold for PCH Thermal Sensor
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Patch Set 9:
(4 comments)
https://review.coreboot.org/c/coreboot/+/33129/9/src/soc/intel/cannonlake/in...
File src/soc/intel/cannonlake/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/33129/9/src/soc/intel/cannonlake/in...
PS9, Line 71: #define THERMAL_BASE_ADDRESS 0xfe600000
Not used anymore.
Ack
https://review.coreboot.org/c/coreboot/+/33129/9/src/soc/intel/cannonlake/th...
File src/soc/intel/cannonlake/thermal.c:
https://review.coreboot.org/c/coreboot/+/33129/9/src/soc/intel/cannonlake/th...
PS9, Line 40:
nit: […]
Sure. Thanks.
https://review.coreboot.org/c/coreboot/+/33129/9/src/soc/intel/cannonlake/th...
PS9, Line 87: /* Use default pre-ram bar */
Comment is not true anymore.
Yes, Thanks.
https://review.coreboot.org/c/coreboot/+/33129/9/src/soc/intel/cannonlake/th...
PS9, Line 89: PCH
ERROR: PCH thermalbar not found! […]
Sure.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ibd1e669fcbfe8dc6e6e5556aa5b1373ed19c3685
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