Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37115 )
Change subject: sb/intel/bd82x6x: Support ME Soft Temporary Disable Mode ......................................................................
Patch Set 9:
(7 comments)
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/me_8.x.c:
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 521: reset
Renamed and added some comments.
Removed.
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 523: struct device *lpc = pcidev_on_root(0x1f, 0); : u32 etr3 = pci_read_config32(lpc, ETR3)
Isn't this replaceable with config_of ?
Moved to a separate file.
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 535: }
could be: […]
Done
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 537: enable
How about naming this *enter*_soft_temp_disable_mode() and the other *exit*?
Done
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 539: 0x06, 0x01
Added a comment.
Done
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 546: .length = sizeof(mkhi) + sizeof(message),
Gerrit shows one tab too many?
Done
https://review.coreboot.org/c/coreboot/+/37115/5/src/southbridge/intel/bd82x... PS5, Line 774: if (me_disable) {
I would prefer to only act if `me_disable_prev` differs. If both are 1, […]
Done