Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36551 )
Change subject: soc/intel/tigerlake/include: Include headers from soc/intel/icelake ......................................................................
Patch Set 1:
(3 comments)
Patch Set 1:
(1 comment)
Please add headers in the same CL as where they are used. It's not possible to review them this way.
started with https://review.coreboot.org/c/coreboot/+/36550 CL
https://review.coreboot.org/c/coreboot/+/36551/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36551/1//COMMIT_MSG@18 PS1, Line 18: Tiger Lake specific changes will follow in subsequent patches.
are those patchsets public yet?
waiting for base CLs to get merged
https://review.coreboot.org/c/coreboot/+/36551/1/src/soc/intel/tigerlake/inc... File src/soc/intel/tigerlake/include/soc/gpio.h:
https://review.coreboot.org/c/coreboot/+/36551/1/src/soc/intel/tigerlake/inc... PS1, Line 19: * Chapter number: 27
the datasheet holds a CROS_GPIO device name?
no chapter 27 for GPIO details.
For now you can refer to https://cateee.net/lkddb/web-lkddb/PINCTRL_ICELAKE.html but one has to refer to https://cateee.net/lkddb/web-lkddb/PINCTRL_TIGERLAKE.html once available for TGL
https://review.coreboot.org/c/coreboot/+/36551/1/src/soc/intel/tigerlake/inc... File src/soc/intel/tigerlake/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/36551/1/src/soc/intel/tigerlake/inc... PS1, Line 22: #define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
where are those address taken from?
added in https://review.coreboot.org/c/coreboot/+/36550/5/src/soc/intel/tigerlake/inc...