Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46312 )
Change subject: soc/intel/common: Move CSE RW into new FMAP region to optimize boot time ......................................................................
Patch Set 13:
(9 comments)
https://review.coreboot.org/c/coreboot/+/46312/10/src/soc/intel/common/block... File src/soc/intel/common/block/cse/Kconfig:
https://review.coreboot.org/c/coreboot/+/46312/10/src/soc/intel/common/block... PS10, Line 33: FW_MAIN_A
ME_RW_A (inline with SI_ME) will be used for consistency
Done
https://review.coreboot.org/c/coreboot/+/46312/10/src/soc/intel/common/block... PS10, Line 40: FW_MAIN_B
ME_RW_B will be used for consistency
Done
https://review.coreboot.org/c/coreboot/+/46312/11/src/soc/intel/common/block... File src/soc/intel/common/block/cse/Kconfig:
https://review.coreboot.org/c/coreboot/+/46312/11/src/soc/intel/common/block... PS11, Line 35: Location
Name of CSE RW A region in FMAP
Ack
https://review.coreboot.org/c/coreboot/+/46312/11/src/soc/intel/common/block... PS11, Line 42: Location of CSE RW B in FMAP
Name of CSE RW A region in FMAP
Ack
https://review.coreboot.org/c/coreboot/+/46312/10/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/46312/10/src/soc/intel/common/block... PS10, Line 590: source_info
source_info or source_metadata?
Done
https://review.coreboot.org/c/coreboot/+/46312/10/src/soc/intel/common/block... PS10, Line 764: *source_info
I think it would be good to have "metadata" in the name just to make it easier to relate that this i […]
Done
https://review.coreboot.org/c/coreboot/+/46312/11/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/46312/11/src/soc/intel/common/block... PS11, Line 504:
nit: extra blank space not required.
Ack
https://review.coreboot.org/c/coreboot/+/46312/11/src/soc/intel/common/block... PS11, Line 506:
nit: extra blank space not required.
Ack
https://review.coreboot.org/c/coreboot/+/46312/11/src/soc/intel/common/block... PS11, Line 797: SOC_INTEL_CSE_RW_UPDATE
This still needs to be defined in one of the preceding CLs.
done