Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34349 )
Change subject: soc/intel/{cnl,icl}: Add support to configure interrupt overrides
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Patch Set 15: Code-Review-1
(1 comment)
https://review.coreboot.org/c/coreboot/+/34349/15//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/34349/15//COMMIT_MSG@7
PS15, Line 7: overrides
What are you overriding? You read the current configuration from registers and pass that on to FSP? Please explain more thoroughly what you are doing and why this is needed?
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