3 May
2019
3 May
'19
8:31 a.m.
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32539 )
Change subject: soc/intel/cannonlake/acpi: Add board level s0ix call back ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/32539/1/src/soc/intel/cannonlake/acpi/lpit.a... File src/soc/intel/cannonlake/acpi/lpit.asl:
https://review.coreboot.org/#/c/32539/1/src/soc/intel/cannonlake/acpi/lpit.a... PS1, Line 79: 1
This should be 0.
yes..
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I404f388b19355ae89b36d1fb07f9fb4f97eb3b2d
Gerrit-Change-Number: 32539
Gerrit-PatchSet: 1
Gerrit-Owner: EricR Lai ericr_lai@compal.corp-partner.google.com
Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org
Gerrit-Reviewer: EricR Lai ericr_lai@compal.corp-partner.google.com
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Lijian Zhao lijian.zhao@intel.com
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