Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41612 )
Change subject: util: Add spd_tools to generate SPDs for TGL boards ......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/41612/8/util/spd_tools/intel/lp4x/g... File util/spd_tools/intel/lp4x/gen_spd.go:
https://review.coreboot.org/c/coreboot/+/41612/8/util/spd_tools/intel/lp4x/g... PS8, Line 407: SPD_VALUE_BUS_WIDTH = 0x01
I haven't yet addressed this. Looking at the advisory to see what all differs between TGL and JSL. […]
Done
https://review.coreboot.org/c/coreboot/+/41612/8/util/spd_tools/intel/lp4x/g... PS8, Line 425: SPD_VALUE_TCK_MAX = 0xff
I see that tckMax is 100ns for for Micron as per datasheet for MT53E512M32D2NP-046WT:F - Table 187. […]
Done