[coreboot-gerrit] Change in coreboot[master]: mb/google/kahlee: Start PCIe reset sooner on careena devices

[Martin Roth (Code Review)]

Hello Kevin Chiu, Patrick Georgi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40817

to look at the new patch set (#2).

Change subject: mb/google/kahlee: Start PCIe reset sooner on careena devices
......................................................................

mb/google/kahlee: Start PCIe reset sooner on careena devices

The realtek RTL8822CE wifi module needs a PCIe reset of at least 6ms
instead of the ~200us reset that is typically done by AGESA. By starting
the reset earlier, we get a longer reset without making the boot time
any longer.

BUG=b:154848243
BRANCH=firmware-grunt-11031.B
TEST=Check reset on a scope.  This change results in an 18ms
delay roughly 425ms after power on. RTL8822CE module works.

Signed-off-by: Martin Roth 
Change-Id: If2d2c72445daeea8567b8ee989533785c35667e8
---
M src/mainboard/google/kahlee/variants/careena/Makefile.inc
M src/mainboard/google/kahlee/variants/careena/variant.c
M src/soc/amd/stoneyridge/include/soc/southbridge.h
3 files changed, 5 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/40817/2