[coreboot-gerrit] Change in coreboot[master]: [RFC] cpu/intel/car: Use symbols for CAR MTRR setup

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30873 )

Change subject: [RFC] cpu/intel/car: Use symbols for CAR MTRR setup
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:

https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block/... 
PS4, Line 109: #if 0
> Do we need two MTRRs? Don't we get the same cacheline utilisation by limiting the load to _car_mtrr_size below.

But you are covering a part of the memory address space as cacheable when it shouldn't be. Speculation and prefetching can occur (implementation defined) on WB memory.