Attention is currently required from: Bill XIE. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52344 )
Change subject: mb/asus/p8z77-v_lx2: Add CMOS option support ......................................................................
Patch Set 5:
(4 comments)
Patchset:
PS4:
On Patchset 3 gfx_uma_size only has 3 bit, not enough for 15 (512M).
Ah, didn't notice it.
File src/mainboard/asus/p8z77-v_lx2/cmos.layout:
https://review.coreboot.org/c/coreboot/+/52344/comment/00cde727_927049b0 PS4, Line 20: 400 1 e 1 hyper_threading
Done
No. Where is this used? CB:29669 allows controlling Hyper-Threading for Sandy/Ivy Bridge, but it is not merged yet.
File src/mainboard/asus/p8z77-v_lx2/cmos.layout:
https://review.coreboot.org/c/coreboot/+/52344/comment/ac9d85b1_8e565033 PS5, Line 25: 1 2 bits
https://review.coreboot.org/c/coreboot/+/52344/comment/034600db_bbd6ba4b PS5, Line 98: 6 30 992M Encoding is non-linear: https://imgur.com/kiRxPst.png
Note that chipset code adds one: https://github.com/coreboot/coreboot/blob/master/src/northbridge/intel/sandy...
6 0 32M 6 1 64M 6 2 96M 6 3 128M 6 4 160M 6 5 192M 6 6 224M 6 7 256M 6 8 288M 6 9 320M 6 10 352M 6 11 384M 6 12 416M 6 13 448M 6 14 480M 6 15 512M 6 16 1024M