Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29414 )
Change subject: src/soc/intel/braswell: Remove disabled LPE acpi code ......................................................................
Patch Set 5:
(5 comments)
https://review.coreboot.org/#/c/29414/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/29414/5//COMMIT_MSG@7 PS5, Line 7: acpi ACPI
https://review.coreboot.org/#/c/29414/5//COMMIT_MSG@7 PS5, Line 7: src/ Please remove.
https://review.coreboot.org/#/c/29414/5//COMMIT_MSG@9 PS5, Line 9: The ACPI code for LPE device was included regardless : of the availability of the LPE controller. : Move the LPE ACPI code to seperate SSDT and hide it when : LPE is disabled. Please use the full text width, and add a blank line between paragraphs.
https://review.coreboot.org/#/c/29414/5/src/mainboard/google/cyan/acpi/codec... File src/mainboard/google/cyan/acpi/codec_maxim.asl:
https://review.coreboot.org/#/c/29414/5/src/mainboard/google/cyan/acpi/codec... PS5, Line 39: Method(_CRS, 0x0, Serialized) Please make this a separate commit.
https://review.coreboot.org/#/c/29414/5/src/soc/intel/braswell/include/soc/a... File src/soc/intel/braswell/include/soc/acpi.h:
https://review.coreboot.org/#/c/29414/5/src/soc/intel/braswell/include/soc/a... PS5, Line 29: unsigned long current, Doesn’t this fit on the line above?