Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42448
to look at the new patch set (#17).
Change subject: temporarily silent GCC overflow warning on MCHBARx_AND_OR macro ......................................................................
temporarily silent GCC overflow warning on MCHBARx_AND_OR macro
GCC-10 highlighted a none reliable MCHBARx_AND_OR macro:
x4x: src/northbridge/intel/x4x/x4x.h:79:16: error: overflow in conversion from 'int' to 'u8' {aka 'volatile unsigned char'} changes value from '(int)*(volatile u8 *)((unsigned int)((int)i * 1024) + 4275126888) & -256 | 74' to '74' [-Werror=overflow] 79 | (MCHBAR8(x) = (MCHBAR8(x) & (and)) | (or)) | ^ src/northbridge/intel/x4x/raminit_ddr23.c:627:3: note: in expansion of macro 'MCHBAR8_AND_OR' 627 | MCHBAR8_AND_OR(0x400*i + 0x268, ~0xff, 0x4a); | ^~~~~~~~~~~~~~ src/northbridge/intel/x4x/raminit_ddr23.c: In function 'prog_rcomp': src/northbridge/intel/x4x/x4x.h:83:17: error: overflow in conversion from 'int' to 'u16' {aka 'volatile short unsigned int'} changes value from '(int)*(volatile u16 *)((unsigned int)((int)i * 1024) + 4275127072) & -65536 | 26214' to '26214' [-Werror=overflow] 83 | (MCHBAR16(x) = (MCHBAR16(x) & (and)) | (or)) | ^
and for pineview: src/northbridge/intel/pineview/raminit.c: In function 'sdram_timings': src/northbridge/intel/pineview/pineview.h:98:52: error: overflow in conversion from 'int' to 'u8' {aka 'volatile unsigned char'} changes value from '(int)*4275126567 & -256 | 64' to '64' [-Werror=overflow] 98 | #define MCHBAR8_AND_OR(x, and, or) (MCHBAR8(x) = (MCHBAR8(x) & (and)) | (or)) | ^ src/northbridge/intel/pineview/raminit.c:793:2: note: in expansion of macro 'MCHBAR8_AND_OR' 793 | MCHBAR8_AND_OR(SHPAGECTRL, ~0xff, 0x40); | ^~~~~~~~~~~~~~
Change-Id: I07c1b3bd00de27c115994233086d32497b4c0925 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M Makefile.inc 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/42448/17