[coreboot-gerrit] Change in coreboot[master]: src/drivers/pc80/tpm/tis.c: Dont use port value when invalid.

[Philipp Deppenwiese (Code Review)]

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/29331 )

Change subject: src/drivers/pc80/tpm/tis.c: Dont use port value when invalid.
......................................................................

src/drivers/pc80/tpm/tis.c: Dont use port value when invalid.

port is allocated in ACPI, without checking for value.
Don't use port value when zero.

BUG=N/A
TEST=Portwell PQ-M107

Change-Id: Ia44281b82d003b29bffbf985b774ddd661b65c4e
Signed-off-by: Frans Hendriks 
Reviewed-on: https://review.coreboot.org/29331
Tested-by: build bot (Jenkins) 
Reviewed-by: Philipp Deppenwiese 
---
M src/drivers/pc80/tpm/tis.c
1 file changed, 3 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Philipp Deppenwiese: Looks good to me, approved

diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c
index 6b84614..f7d9d6f 100644
--- a/src/drivers/pc80/tpm/tis.c
+++ b/src/drivers/pc80/tpm/tis.c
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
+ * Copyright (C) 2018 Eltan B.V.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -911,7 +912,8 @@
    acpigen_write_name("_CRS");
    acpigen_write_resourcetemplate_header();
    acpigen_write_mem32fixed(1, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000);
-	acpigen_write_io16(port, port, 1, 2, 1);
+	if (port)
+		acpigen_write_io16(port, port, 1, 2, 1);

if (CONFIG_TPM_PIRQ) {
    	/*