Uwe Poeche has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34173 )
Change subject: sb/intel/common/spi: Increase flash erase timeout ......................................................................
Patch Set 7:
(5 comments)
https://review.coreboot.org/c/coreboot/+/34173/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/34173/5//COMMIT_MSG@9 PS5, Line 9: 200ms
it's 1s now
Done
https://review.coreboot.org/c/coreboot/+/34173/5//COMMIT_MSG@15 PS5, Line 15: operation if the ambient temperature increases. The measured time values are in
Maybe I'm wrong, but Gerrit shows this line as 7 chars too long.
Done
https://review.coreboot.org/c/coreboot/+/34173/5/src/southbridge/intel/commo... File src/southbridge/intel/common/spi.c:
https://review.coreboot.org/c/coreboot/+/34173/5/src/southbridge/intel/commo... PS5, Line 31:
And once you touch this file you can delete this newline, too
Done
https://review.coreboot.org/c/coreboot/+/34173/5/src/southbridge/intel/commo... PS5, Line 35:
Get rid of this extra newline please.
Done
https://review.coreboot.org/c/coreboot/+/34173/5/src/southbridge/intel/commo... PS5, Line 733: //unsigned int timeout = 1000 * SPI_FLASH_PROG_TIMEOUT;
please drop
Done