Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Karthik Ramasubramanian, Mark Hasemeyer, Matt DeVillier.
Hello Felix Held, Fred Reitberger, Jason Glenesk, Mark Hasemeyer, Matt DeVillier, Tim Van Patten, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/79155?usp=email
to look at the new patch set (#2).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: soc/amd/common/psp_verstage: Make SPI ROM mapping configurable ......................................................................
soc/amd/common/psp_verstage: Make SPI ROM mapping configurable
Earlier entire SPI ROM was mapped to memory. With limited TLB resources in PSP, this approach hit the limit on systems using 32 MiB SPI ROM. Therefore regions in SPI ROM were mapped on need basis. This works well on Picasso, Mendocino and Phoenix SoCs. But unfortunately this causes boot hangs in Cezanne SoC. Add a configuration to map the entire SPI ROM and enable it in Cezanne SoC. For other SoCs, keep the configuration disabled so that only the required SPI ROM region is mapped.
BUG=b:309690716 TEST=Build and boot to OS in both Dewatt and Skyrim.
Change-Id: I166ac7b50b367c067e1a743fc94686e69dd07844 Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com --- M src/soc/amd/common/psp_verstage/Kconfig M src/soc/amd/common/psp_verstage/boot_dev.c M src/soc/amd/common/psp_verstage/fch.c M src/soc/amd/common/psp_verstage/psp_verstage.c 4 files changed, 30 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/79155/2