Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47449 )
Change subject: soc/intel/xeon_sp: Lock down DMIC ......................................................................
soc/intel/xeon_sp: Lock down DMIC
This is required for CBnT.
Change-Id: I290742c163f5f067c8d529ddca8e2d8572ab6e6a Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/xeon_sp/pch.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/47449/1
diff --git a/src/soc/intel/xeon_sp/pch.c b/src/soc/intel/xeon_sp/pch.c index 5427952..2b35223 100644 --- a/src/soc/intel/xeon_sp/pch.c +++ b/src/soc/intel/xeon_sp/pch.c @@ -39,6 +39,9 @@ reg32 = (0x3f << 18) | ACPI_BASE_ADDRESS | 1; pcr_write32(PID_DMI, PCR_DMI_ACPIBA, reg32); pcr_write32(PID_DMI, PCR_DMI_ACPIBDID, 0x23a8); + + reg32 = pcr_read32(PID_DMI, PCR_DMI_DMICTL); + pcr_write32(PID_DMI, PCR_DMI_DMICTL, reg32 | PCR_DMI_DMICTL_SRLOCK); }
void bootblock_pch_init(void)