Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38601 )
Change subject: asus/p2b,asus/p2b-ls: Declare _SB.PCI0.MBRS in DSDT ......................................................................
asus/p2b,asus/p2b-ls: Declare _SB.PCI0.MBRS in DSDT
sb/intel/i82371eb/isa.c has code that fills this path with CPU info, which was triggering errors in Linux because it was not declared in the DSDT.
Change-Id: Ib85dd02504b068bb7ea71be2f22e425f3831595a Signed-off-by: Keith Hui buurin@gmail.com --- M src/mainboard/asus/p2b-ls/dsdt.asl M src/mainboard/asus/p2b/dsdt.asl 2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/38601/1
diff --git a/src/mainboard/asus/p2b-ls/dsdt.asl b/src/mainboard/asus/p2b-ls/dsdt.asl index 83e1df6..b350bc9 100644 --- a/src/mainboard/asus/p2b-ls/dsdt.asl +++ b/src/mainboard/asus/p2b-ls/dsdt.asl @@ -175,6 +175,7 @@
}) #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl> + #include <southbridge/intel/i82371eb/acpi/isabridge.asl>
/* Begin southbridge block */ Device (PX40) @@ -193,6 +194,7 @@ Device (SYSR) { Name (_HID, EisaId ("PNP0C02")) + Name (_UID, 0x02) Method (_CRS, 0, NotSerialized) { Name (BUF1, ResourceTemplate () diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index 279f772..3fc531a 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -161,6 +161,7 @@
}) #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl> + #include <southbridge/intel/i82371eb/acpi/isabridge.asl>
/* Begin southbridge block */ Device (PX40) @@ -179,6 +180,7 @@ Device (SYSR) { Name (_HID, EisaId ("PNP0C02")) + Name (_UID, 0x02) Method (_CRS, 0, NotSerialized) { Name (BUF1, ResourceTemplate ()