Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42410 )
Change subject: nb/intel/sandybridge/gma.c: Remove useless if condition
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42410/1/src/northbridge/intel/sandy...
File src/northbridge/intel/sandybridge/gma.c:
https://review.coreboot.org/c/coreboot/+/42410/1/src/northbridge/intel/sandy...
PS1, Line 510: gtt_write(0xa188, 0x1fffe);
not sure why there should be a separate write? there are no polls between them. […]
The intermediate value of a register may be required to properly transition from one state to another. I've seen that in raminit code when disabling special modes.
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