[coreboot-gerrit] [L] Change in coreboot[main]: mb/asus/p8z77-v: Add support to reconfigure PCIe lanes

[Keith Hui (Code Review)]

Attention is currently required from: Angel Pons, Keith Hui, Nicholas Chin.

Hello Bill XIE, Nicholas Chin, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85413?usp=email

to look at the new patch set (#8).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: mb/asus/p8z77-v: Add support to reconfigure PCIe lanes
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mb/asus/p8z77-v: Add support to reconfigure PCIe lanes

Bill Xie documented in his initial code drop that he was unsuccessful
in reproducing all the PCIe configurations possible with vendor
firmware. I obtained a boardview to this board and have identified the
PCIe lane topology and the required control signals.

There are PCIe slot presence signals wired to GPIOs 34,20,7 for
PCIEX1_1,PCIEX1_2,PCIEX16_3 respectively, the last one only sense the
presence of a PCIe x4 or larger card. PCIe lanes 1-4 are routed by way
of three ASM1440 2-way switches controlled by GP54-GP56 on NCT6779D
super I/O chip. PCIe lanes 5-8 are fixed.

With these details, it is now possible to attempt to reproduce all the
vendor PCIe configurations.

1. Change GPIO20 of PCH to GPIO input so coreboot can detect a
card inserted into PCIEX1_2.
2a. Add an nvram option to force PCIe lane 4 to serve ASM1061 and its
two SATA 6Gbps ports.
2b. Add an nvram option to allow selecting PCIEX16_3 bandwidth between
auto (tries to sense for a card in PCIEX1_2 and prioritize it, subject
to #2a, otherwise same as x1), x1, x2 (experimental; disables PCIEX1_1,
not a vendor option), x4.
3. Based on (1) and (2), program SIO GPIO5 and soft strap as appropriate.
Remove all GPIO5 settings from devicetree so this code has full control.

Supporting code around reflashing the PCH soft straps are factored out
as a separate unit at asus/p8x7x-series, available via a new Kconfig.
This is because p8z77-v_le_plus and Sabertooth Z77 also have similar
needs.

BUG=https://ticket.coreboot.org/issues/583

Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c
Signed-off-by: Keith Hui 
---
M src/mainboard/asus/p8x7x-series/Kconfig
M src/mainboard/asus/p8x7x-series/Makefile.mk
M src/mainboard/asus/p8x7x-series/mainboard.c
A src/mainboard/asus/p8x7x-series/pcielane.c
A src/mainboard/asus/p8x7x-series/pcielane.h
M src/mainboard/asus/p8x7x-series/variants/p8z77-v/cmos.default
M src/mainboard/asus/p8x7x-series/variants/p8z77-v/cmos.layout
M src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c
M src/mainboard/asus/p8x7x-series/variants/p8z77-v/gpio.c
M src/mainboard/asus/p8x7x-series/variants/p8z77-v/overridetree.cb
A src/mainboard/asus/p8x7x-series/variants/p8z77-v/pcielane.c
11 files changed, 385 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/85413/8