[coreboot-gerrit] [XS] Change in coreboot[main]: mb/google/fatcat/var/francka: Update Touch screen configuration

[Ian Feng (Code Review)]

Ian Feng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86117?usp=email )

Change subject: mb/google/fatcat/var/francka: Update Touch screen configuration
......................................................................

mb/google/fatcat/var/francka: Update Touch screen configuration

Correct the GPIO pin(GPP_B18) configuration issue base on schematic.
TCHSCR_REPORT_DISABLE(GPP_B18):
Low : Enable
High : Disable

BUG=b:391720235
TEST=Build and boot to OS in francka. Touch screen is workable.

Change-Id: Iba26f496176c2e406285df323e3da3e861fa2ffc
Signed-off-by: Ian Feng 
---
M src/mainboard/google/fatcat/variants/francka/gpio.c
M src/mainboard/google/fatcat/variants/francka/overridetree.cb
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/86117/1

diff --git a/src/mainboard/google/fatcat/variants/francka/gpio.c b/src/mainboard/google/fatcat/variants/francka/gpio.c
index a5d5ad9..8819122 100644
--- a/src/mainboard/google/fatcat/variants/francka/gpio.c
+++ b/src/mainboard/google/fatcat/variants/francka/gpio.c
@@ -86,7 +86,7 @@
    /* GPP_B17:     SOC_ENVDD2 */
    PAD_CFG_NF(GPP_B17, NONE, DEEP, NF2),
    /* GPP_B18:     TCHSCR_REPORT_DISABLE */
-	PAD_CFG_GPO(GPP_B18, 0, PLTRST),
+	PAD_CFG_GPO(GPP_B18, 1, PLTRST),
    /* GPP_B19:     SOC_CNVI_EN# */
    PAD_CFG_GPO(GPP_B19, 0, PLTRST),
    /* GPP_B20:     SOC_WWAN_RST# */
diff --git a/src/mainboard/google/fatcat/variants/francka/overridetree.cb b/src/mainboard/google/fatcat/variants/francka/overridetree.cb
index fed7294..9d2dd2f 100644
--- a/src/mainboard/google/fatcat/variants/francka/overridetree.cb
+++ b/src/mainboard/google/fatcat/variants/francka/overridetree.cb
@@ -200,7 +200,7 @@
    			register "generic.detect" = "1"
    			register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B08)"
    			register "generic.reset_delay_ms" = "200"
-				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B18)"
+				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B18)"
    			register "generic.enable_delay_ms" = "12"
    			register "generic.has_power_resource" = "1"
    			register "hid_desc_reg_offset" = "0x01"