[coreboot-gerrit] Change in coreboot[master]: mb/google/guybrush/var/guybrush: Add FPMCU configration

[Ivy Jian (Code Review)]

Attention is currently required from: Furquan Shaikh, Bhanu Prakash Maiya, EricR Lai.
Ivy Jian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52181 )

Change subject: mb/google/guybrush/var/guybrush: Add FPMCU configration
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Patch Set 9:

(1 comment)

File src/mainboard/google/guybrush/variants/guybrush/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/52181/comment/bb39fa01_e9e42780 
PS9, Line 113: register "has_power_resource" = "1"
> I am thinking we can connect these pins to EC next time :p We don't care about the driver and CPU...

I tried configure GPIO_32 to high and GPIO_11 to low in "early_gpio_table" then de-assert reset in "base_gpio_table", it is working in serial fw, I will try it in no-serial fw when get it working.
But I checked the PPR, both GPIO_11 and GPIO_32 are S5 Domain, does that mean the signals won't retain state in S3 or S0i3?