Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38689 )
Change subject: src/commonlib: Fix typos ......................................................................
src/commonlib: Fix typos
Change-Id: Ida1770c5e4b18c536e4943eb9cf862d69196c589 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/38689 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/commonlib/cbfs.c M src/commonlib/include/commonlib/storage.h M src/commonlib/storage/sd.c 3 files changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/commonlib/cbfs.c b/src/commonlib/cbfs.c index 5c9aacb..be0de9f 100644 --- a/src/commonlib/cbfs.c +++ b/src/commonlib/cbfs.c @@ -44,7 +44,7 @@ if (f == NULL) return 0;
- /* The region_device objects store absolute offets over the whole + /* The region_device objects store absolute offsets over the whole * region. Therefore a relative offset needs to be calculated. */ offset = rdev_relative_offset(cbfs, &f->data); offset += region_device_sz(&f->data); diff --git a/src/commonlib/include/commonlib/storage.h b/src/commonlib/include/commonlib/storage.h index 47a2bb6..faba2fe 100644 --- a/src/commonlib/include/commonlib/storage.h +++ b/src/commonlib/include/commonlib/storage.h @@ -57,7 +57,7 @@ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_BUS_WIDTH_STROBE (1<<7) /* Enhanced strobe mode */
-#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */ +#define EXT_CSD_TIMING_BC 0 /* Backwards compatibility */ #define EXT_CSD_TIMING_HS 1 /* High speed */ #define EXT_CSD_TIMING_HS200 2 /* HS200 */ #define EXT_CSD_TIMING_HS400 3 /* HS400 */ diff --git a/src/commonlib/storage/sd.c b/src/commonlib/storage/sd.c index bdb0baa..30af810 100644 --- a/src/commonlib/storage/sd.c +++ b/src/commonlib/storage/sd.c @@ -220,7 +220,7 @@ if (!((ctrlr->caps & DRVR_CAP_HS52) && (ctrlr->caps & DRVR_CAP_HS))) goto out;
- /* Give the card time to recover afer the switch operation. Wait for + /* Give the card time to recover after the switch operation. Wait for * 9 (>= 8) clock cycles receiving the switch status. */ delay = (9000000 + ctrlr->bus_hz - 1) / ctrlr->bus_hz;