[coreboot-gerrit] Change in coreboot[master]: sb/intel/bd82x6x: drop IGD-related NVS variables

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39952 )

Change subject: sb/intel/bd82x6x: drop IGD-related NVS variables
......................................................................

sb/intel/bd82x6x: drop IGD-related NVS variables

NDID/DID entries are no longer used by the GMA SSDT generator, so
drop them. SSDT generation will be simplified in a subsequent commit.

Change-Id: Ie7491409681d8c2721dd6d6a16a8d5004cd0cf8a
Signed-off-by: Matt DeVillier 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39952
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/bd82x6x/nvs.h
3 files changed, 1 insertion(+), 18 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
index 1b23cef..ac42c7a 100644
--- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
@@ -88,13 +88,6 @@
    TLST,	 8,	// 0x3d - Display Toggle List pointer
    CADL,	 8,	// 0x3e - Currently Attached Devices List
    PADL,	 8,	// 0x3f - Previously Attached Devices List
-	Offset (0x46),
-	NDID,	 8,	// 0x46 - Number of Device IDs
-	DID1,	32,	// 0x47 - Device ID 1
-	DID2,	32,	// 0x4b - Device ID 2
-	DID3,	32,	// 0x4f - Device ID 3
-	DID4,	32,	// 0x53 - Device ID 4
-	DID5,	32,	// 0x57 - Device ID 5
    /* Backlight Control */
    Offset (0x64),
    BLCS,	 8,	// 0x64 - Backlight control possible?
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 1f92193..91d710e 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -26,7 +26,6 @@
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
-#include <drivers/intel/gma/i915.h>
 #include <cpu/x86/smm.h>
 #include <cbmem.h>
 #include <string.h>
@@ -673,7 +672,6 @@
    global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));

if (gnvs) {
-		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
    	memset(gnvs, 0, sizeof(*gnvs));

acpi_create_gnvs(gnvs);
@@ -682,11 +680,6 @@
    	gnvs->mpen = 1; /* Enable Multi Processing */
    	gnvs->pcnt = dev_count_cpu();

-		if (gfx) {
-			gnvs->ndid = gfx->ndid;
-			memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
-		}
-
 #if CONFIG(CHROMEOS)
    	chromeos_init_chromeos_acpi(&(gnvs->chromeos));
 #endif
diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h
index 93ebed6..08b5ebd 100644
--- a/src/southbridge/intel/bd82x6x/nvs.h
+++ b/src/southbridge/intel/bd82x6x/nvs.h
@@ -75,10 +75,7 @@
    u8	tlst; /* 0x3d - Display Toggle List Pointer */
    u8	cadl; /* 0x3e - currently attached devices */
    u8	padl; /* 0x3f - previously attached devices */
-	u16	rsvd14[3];
-	u8	ndid; /* 0x46 - number of device ids */
-	u32	did[5]; /* 0x47 - 5b device id 1..5 */
-	u8	rsvd5[0x9];
+	u8	rsvd5[36];
    /* Backlight Control */
    u8	blcs; /* 0x64 - Backlight Control possible */
    u8	brtl;