the following patch was just integrated into master: commit e65affa2ed5d4fea584532c5cf27bf51ed1f56eb Author: Robbie Zhang robbie.zhang@intel.com Date: Mon Feb 13 12:07:53 2017 -0800
soc/intel/skylake: add PrmrrSize to chip config
Prmrr configuration is supported by Kabylake FSP-M with UPD provided. It is required as one of the SGX initialization steps in BIOS.
BUG=chrome-os-partner:62438 BRANCH=NONE TEST=Tested on Eve, verified uncore PRMRR MSRs get programmed to set size and boot.
Change-Id: I2b3dc7c92487505165ee429bd1a37bd60ceac8f3 Signed-off-by: Robbie Zhang robbie.zhang@intel.com Reviewed-on: https://review.coreboot.org/18361 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Aaron Durbin adurbin@chromium.org
See https://review.coreboot.org/18361 for details.
-gerrit