Attention is currently required from: Shelley Chen, Ravi kumar, Martin Roth, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52375 )
Change subject: sc7280: Add PCIe Root Complex driver in coreboot ......................................................................
Patch Set 5:
(60 comments)
File src/soc/qualcomm/sc7280/include/soc/addressmap.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/d7f8eeb6_fee88118 PS5, Line 65: #define PCIE1_IO_ADDR 0x40200000 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/58ec4560_73b7d346 PS5, Line 68: #define PCIE1_MEM_SIZE 0x1fd00000 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/32e350a8_3428f447 PS5, Line 69: #define PCIE_MEM_END 0x404fffff please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/10e0abf4_0f630591 PS5, Line 72: #define PCIE_1_QMP_PHY 0x01C0E000 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/e50e7e86_ace31d21 PS5, Line 76: #define PCE1_QPHY_SERDES 0x01C0E000 please, no space before tabs
File src/soc/qualcomm/sc7280/include/soc/pcie.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/0657d714_4377df02 PS5, Line 12: #define GPIO_PERST 2 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/0949e554_7a78b77a PS5, Line 14: #define PCIE_DEV_FUNC (dev,func) PCI_SLOT(devfn) | PCI_FUNC(devfn) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/356fb92c_4d4ef39c PS5, Line 14: #define PCIE_DEV_FUNC (dev,func) PCI_SLOT(devfn) | PCI_FUNC(devfn) Macros with complex values should be enclosed in parentheses
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/dfc5d499_576ccd3b PS5, Line 94: #define PCIE_DEV(_bus, _dev, _fn) (0x80000000 | \ Macros with complex values should be enclosed in parentheses
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/41986193_b9da35af PS5, Line 106: #define PCIE_BUS_CFG(pri,sec,sub) ((sub & 0xFF)<<16|(sec & 0xFF)<<8|(pri&0xFF)) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/99d1ce66_a90e4d94 PS5, Line 106: #define PCIE_BUS_CFG(pri,sec,sub) ((sub & 0xFF)<<16|(sec & 0xFF)<<8|(pri&0xFF)) space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/449c7c05_5e110d4c PS5, Line 215: #define PCIE1_QMP_PHY_PCS_COM 0x01C0EA00 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/9ec9caeb_5a6968f9 PS5, Line 216: #define PCE1_QPHY_SERDES 0x01C0E000 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/6e471cc9_f12042c6 PS5, Line 217: #define PCE1_QPHY_TX0 0x01C0E200 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/0e6b367d_9ec47986 PS5, Line 218: #define PCE1_QPHY_RX0 0x01C0E400 please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/e47dd438_9f2a3be9 PS5, Line 230: unsigned int offset; please, no spaces at the start of a line
File src/soc/qualcomm/sc7280/include/soc/qcom_qmp_phy.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/9227b7ea_e4299af0 PS5, Line 61: #define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_TX 0x3c please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/4dda2a2b_b2bd58d5 PS5, Line 62: #define QSERDES_V4_TX_RES_CODE_LANE_OFFSET_RX 0x40 please, no space before tabs
File src/soc/qualcomm/sc7280/pcie_host.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/71fb1a0e_72d83170 PS5, Line 89: }qmp_phy_cfg_t; space required after that close brace '}'
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/a9cd1957_17d17756 PS5, Line 249: .qmp_phy_base = (void *) PCIE_1_QMP_PHY, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/b039069e_6299c42f PS5, Line 250: .serdes = (void *) PCE1_QPHY_SERDES, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/e8e40dc9_65f70a53 PS5, Line 251: .tx0 = (void *) PCE1_QPHY_TX0, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/cf7224c5_ae1c515e PS5, Line 252: .rx0 = (void *) PCE1_QPHY_RX0, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/60977e0f_e0af3ff4 PS5, Line 253: .pcs = (void *) PCIE1_QMP_PHY_PCS_COM, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/561b8bf8_0479b3ad PS5, Line 254: .tx1 = (void *) PCE1_QPHY_TX1, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/3a6c4959_7628b59d PS5, Line 255: .rx1 = (void *) PCE1_QPHY_RX1, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/b6d1c278_574679af PS5, Line 256: .pcs_misc = (void *) PCE1_QPHY_PCS_MISC, please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/a5a5de73_eeab3df0 PS5, Line 270: .pcs_tbl_num_sec= ARRAY_SIZE(sc7280_qmp_gen3x2_pcie_pcs_tbl), spaces required around that '=' (ctx:VxW)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/d9f134e5_2fb10145 PS5, Line 272: .pcs_misc_tbl_num= ARRAY_SIZE(sc7280_qmp_pcie_pcs_misc_tbl), spaces required around that '=' (ctx:VxW)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/a3a25f53_ae012716 PS5, Line 444: printk(BIOS_INFO, "PCIE1: Assert the reset of EP \n"); unnecessary whitespace before a quoted newline
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/22e974e2_22f1a690 PS5, Line 676: if (!bar_response) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/3ae7917e_c1840e7c PS5, Line 902: const struct qcom_qmp_phy_init_tbl tbl[], int num, uint8_t ln_mask) code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/dd0674fa_c3af4af3 PS5, Line 902: const struct qcom_qmp_phy_init_tbl tbl[], int num, uint8_t ln_mask) please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/d9a2701f_bb5ec804 PS5, Line 908: if (!(t->lane_mask & ln_mask)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/b7da32ff_44a8d5b5 PS5, Line 966: trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/17453e0a_adfff692 PS5, Line 969: if (ret) { suspect code indent for conditional statements (8, 13)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/dcd41bed_a7d0df76 PS5, Line 970: printk(BIOS_ERR, " %s(): Pipe clock enable failed\n", __func__); trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/d267a306_32b8e378 PS5, Line 971: return -1; Statements should start on a tabstop
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/135d2e54_c99f4f86 PS5, Line 989: pcie_rc_config_t *pcierc = pcie->rc_cfg; code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/b781d623_530c03c4 PS5, Line 989: pcie_rc_config_t *pcierc = pcie->rc_cfg; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/1768bd95_f3fb886a PS5, Line 990: uint64_t ep_config_base, ep_config_size; code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/08bcfb67_32f9f625 PS5, Line 990: uint64_t ep_config_base, ep_config_size; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/6d697c24_332cd8dc PS5, Line 992: ep_config_base = (uint64_t)pcierc->cfg_base; code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/9e0fa1df_1116c69c PS5, Line 992: ep_config_base = (uint64_t)pcierc->cfg_base; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/e3a78a39_d90a2e64 PS5, Line 993: ep_config_size = pcierc->cfg_size; code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/3e66e674_72cbfccf PS5, Line 993: ep_config_size = pcierc->cfg_size; please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/2f00b0c6_881f9be6 PS5, Line 996: qcom_dw_pcie_prog_outbound_atu(pcie, PCIE_ATU_REGION_INDEX1, code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/d7481b8c_c79ff960 PS5, Line 996: qcom_dw_pcie_prog_outbound_atu(pcie, PCIE_ATU_REGION_INDEX1, please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/90e9edfa_a793ad60 PS5, Line 997: PCIE_ATU_TYPE_CFG0, code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/c3bb1923_1a696d14 PS5, Line 997: PCIE_ATU_TYPE_CFG0, please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/1d348ca6_073f40bc PS5, Line 998: ep_config_base, code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/fd091a31_70b68b88 PS5, Line 998: ep_config_base, please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/1e630ee8_c7db5264 PS5, Line 999: (1 << 24), ep_config_size); trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/3fc4f6c6_c5bcf49e PS5, Line 999: (1 << 24), ep_config_size); code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/ad4c0655_523f77b4 PS5, Line 999: (1 << 24), ep_config_size); please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/3c9b4c18_be563316 PS5, Line 1057: for (clk = PCIE_1_SLV_Q2A_AXI_CLK; clk < PCIE_CLK_COUNT - 3; clk ++) { space prohibited before that '++' (ctx:WxB)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/4d482339_d106e025 PS5, Line 1064: trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/78b737e7_394faa0e PS5, Line 1092: if(ret) { space required before the open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/0d1d3c62_1c367498 PS5, Line 1126: if(!ret) { space required before the open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118006): https://review.coreboot.org/c/coreboot/+/52375/comment/03fddd82_f947da65 PS5, Line 1126: if(!ret) { braces {} are not necessary for any arm of this statement