Nico Huber has posted comments on this change. ( https://review.coreboot.org/23662 )
Change subject: sb/intel/i82801gx: Automatically handle disabling functions ......................................................................
Patch Set 4:
(7 comments)
https://review.coreboot.org/#/c/23662/4/src/mainboard/kontron/986lcd-m/devic... File src/mainboard/kontron/986lcd-m/devicetree.cb:
https://review.coreboot.org/#/c/23662/4/src/mainboard/kontron/986lcd-m/devic... PS4, Line 43: register "pcie_port_coalesce" = "1" Why? it would be enabled automatically if needed.
https://review.coreboot.org/#/c/23662/4/src/mainboard/kontron/986lcd-m/romst... File src/mainboard/kontron/986lcd-m/romstage.c:
https://review.coreboot.org/#/c/23662/4/src/mainboard/kontron/986lcd-m/romst... PS4, Line 221: reg32 |= 1; Drop?
https://review.coreboot.org/#/c/23662/4/src/southbridge/intel/i82801gx/i8280... File src/southbridge/intel/i82801gx/i82801gx.c:
https://review.coreboot.org/#/c/23662/4/src/southbridge/intel/i82801gx/i8280... PS4, Line 43: BIOS_EMERG It's not that bad, is it?
https://review.coreboot.org/#/c/23662/4/src/southbridge/intel/i82801gx/i8280... PS4, Line 105: chip_info->pcie_port_coalesce = 1; Why? who else reads it?
https://review.coreboot.org/#/c/23662/4/src/southbridge/intel/i82801gx/i8280... PS4, Line 113: reg32 |= next_port++ << (i * 4); Shouldn't `reg32` be written to some reg or something?
https://review.coreboot.org/#/c/23662/4/src/southbridge/intel/i82801gx/i8280... PS4, Line 118: reg32 |= next_port++ << (i * 4); Ditto.
https://review.coreboot.org/#/c/23662/4/src/southbridge/intel/i82801gx/i8280... PS4, Line 120: } Looks pretty simple, don't we have to patch the devicetree like bd82x6x does?