[coreboot-gerrit] Change in coreboot[master]: [WIP] arch/x86: Add linker script for early DRAM

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35035 )

Change subject: [WIP] arch/x86: Add linker script for early DRAM
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[WIP] arch/x86: Add linker script for early DRAM

Change-Id: I9c084ff6fdcf7e9154436f038705e8679daea780
Signed-off-by: Kyösti Mälkki 
---
A src/arch/x86/early_dram.ld
1 file changed, 50 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/35035/1

diff --git a/src/arch/x86/early_dram.ld b/src/arch/x86/early_dram.ld
new file mode 100644
index 0000000..24b9551
--- /dev/null
+++ b/src/arch/x86/early_dram.ld
@@ -0,0 +1,50 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008-2010 coresystems GmbH
+ * Copyright 2015 Google Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* This file is included inside a SECTIONS block */
+. = CONFIG_DCACHE_RAM_BASE;
+.car.data . (NOLOAD) : {
+	_car_region_start = . ;
+
+	/* Stack for CAR stages. Since it persists across all stages that
+	 * use CAR it can be reused. The chipset/SoC is expected to provide
+	 * the stack size. */
+#if CONFIG(C_ENVIRONMENT_BOOTBLOCK)
+	_car_stack_start = .;
+	. += CONFIG_DCACHE_BSP_STACK_SIZE;
+	_car_stack_end = .;
+#endif
+	/* The pre-ram cbmem console as well as the timestamp region are fixed
+	 * in size. Therefore place them above the car global section so that
+         * multiple stages (romstage and verstage) have a consistent
+         * link address of these shared objects. */
+	PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)
+
+	TIMESTAMP(., 0x200)
+
+	_car_ehci_dbg_info_start = .;
+	/* Reserve sizeof(struct ehci_dbg_info). */
+        . += 80;
+        _car_ehci_dbg_info_end = .;
+
+	_car_region_end = . + CONFIG_DCACHE_RAM_SIZE - (. - _car_region_start);
+}
+
+_bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full");
+#if !CONFIG(CAR_GLOBAL_MIGRATION)
+_bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured");
+#endif