Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33554
Change subject: Use 3rdparty/intel-microcode ......................................................................
Use 3rdparty/intel-microcode
Instead of maintaining this in 3rdparty/blobs use the 3rdparty/intel-microcode which is maintained by Intel.
Microcode updates present in 3rdparty/blobs/soc/intel/{baytrail,broadwell} are left out since those contain updates not present in the Intel repo. Those are presumably early CPU samples that did not end up in products.
Change-Id: Idcfb3c3c774e0b47637e1b5308c28002aa044f1c Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_1067x/Makefile.inc M src/cpu/intel/model_106cx/Makefile.inc M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/model_65x/Makefile.inc M src/cpu/intel/model_67x/Makefile.inc M src/cpu/intel/model_68x/Makefile.inc M src/cpu/intel/model_6bx/Makefile.inc M src/cpu/intel/model_6ex/Makefile.inc M src/cpu/intel/model_6fx/Makefile.inc M src/cpu/intel/model_6xx/Makefile.inc M src/cpu/intel/model_f2x/Makefile.inc M src/cpu/intel/model_f3x/Makefile.inc M src/cpu/intel/model_f4x/Makefile.inc M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/fsp_broadwell_de/Makefile.inc M src/soc/intel/skylake/Makefile.inc 19 files changed, 26 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/33554/1
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index f83d5db..b0ca79f 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -39,5 +39,5 @@ subdirs-y += ../turbo subdirs-y += ../common
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_306cx/microcode.bin -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_4065x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*) +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*) diff --git a/src/cpu/intel/model_1067x/Makefile.inc b/src/cpu/intel/model_1067x/Makefile.inc index 451df6e..caeab56 100644 --- a/src/cpu/intel/model_1067x/Makefile.inc +++ b/src/cpu/intel/model_1067x/Makefile.inc @@ -4,4 +4,4 @@ subdirs-y += ../common subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_1067x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-17-*) diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc index eec544d..a1f2d0d 100644 --- a/src/cpu/intel/model_106cx/Makefile.inc +++ b/src/cpu/intel/model_106cx/Makefile.inc @@ -4,4 +4,4 @@ subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-1c-*) diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 39246c0..f494e9b 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -23,7 +23,7 @@ ramstage-y += stage_cache.c postcar-y += stage_cache.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_2065x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-25-*)
cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S postcar-y += ../car/non-evict/exit_car.S diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index e1fa879..78a6283 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -28,8 +28,8 @@ postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_206ax/microcode.bin -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_306ax/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-2a-*) +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3a-*)
cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S postcar-y += ../car/non-evict/exit_car.S diff --git a/src/cpu/intel/model_65x/Makefile.inc b/src/cpu/intel/model_65x/Makefile.inc index 05ea68e..c1f471c 100644 --- a/src/cpu/intel/model_65x/Makefile.inc +++ b/src/cpu/intel/model_65x/Makefile.inc @@ -16,4 +16,4 @@
ramstage-y += model_65x_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_65x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-05-*) diff --git a/src/cpu/intel/model_67x/Makefile.inc b/src/cpu/intel/model_67x/Makefile.inc index 219a0d2..ef68df4 100644 --- a/src/cpu/intel/model_67x/Makefile.inc +++ b/src/cpu/intel/model_67x/Makefile.inc @@ -16,4 +16,4 @@
ramstage-y += model_67x_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_67x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-07-*) diff --git a/src/cpu/intel/model_68x/Makefile.inc b/src/cpu/intel/model_68x/Makefile.inc index 7e09dc6..95aacb3 100644 --- a/src/cpu/intel/model_68x/Makefile.inc +++ b/src/cpu/intel/model_68x/Makefile.inc @@ -17,4 +17,4 @@ ramstage-y += model_68x_init.c subdirs-y += ../../x86/name
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_68x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-08-*) diff --git a/src/cpu/intel/model_6bx/Makefile.inc b/src/cpu/intel/model_6bx/Makefile.inc index 81e64e3..84f4ff0 100644 --- a/src/cpu/intel/model_6bx/Makefile.inc +++ b/src/cpu/intel/model_6bx/Makefile.inc @@ -1,4 +1,4 @@ ramstage-y += model_6bx_init.c subdirs-y += ../../x86/name
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6bx/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0b-*) diff --git a/src/cpu/intel/model_6ex/Makefile.inc b/src/cpu/intel/model_6ex/Makefile.inc index 46ae7c7..cef2b0b 100644 --- a/src/cpu/intel/model_6ex/Makefile.inc +++ b/src/cpu/intel/model_6ex/Makefile.inc @@ -4,4 +4,4 @@ subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 ramstage-y += ../model_1067x/mp_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6ex/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0e-*) diff --git a/src/cpu/intel/model_6fx/Makefile.inc b/src/cpu/intel/model_6fx/Makefile.inc index 9564bf9..9121e3b 100644 --- a/src/cpu/intel/model_6fx/Makefile.inc +++ b/src/cpu/intel/model_6fx/Makefile.inc @@ -4,4 +4,4 @@ ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6fx/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-0f-*) diff --git a/src/cpu/intel/model_6xx/Makefile.inc b/src/cpu/intel/model_6xx/Makefile.inc index 3ac510f..b2f87ab 100644 --- a/src/cpu/intel/model_6xx/Makefile.inc +++ b/src/cpu/intel/model_6xx/Makefile.inc @@ -1,3 +1,3 @@ ramstage-y += model_6xx_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_66x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-06-*) diff --git a/src/cpu/intel/model_f2x/Makefile.inc b/src/cpu/intel/model_f2x/Makefile.inc index 589e49e..9bb5dca 100644 --- a/src/cpu/intel/model_f2x/Makefile.inc +++ b/src/cpu/intel/model_f2x/Makefile.inc @@ -1,3 +1,3 @@ ramstage-y += model_f2x_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f2x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/0f-02-*) diff --git a/src/cpu/intel/model_f3x/Makefile.inc b/src/cpu/intel/model_f3x/Makefile.inc index 19b2e93..ed1eb5f 100644 --- a/src/cpu/intel/model_f3x/Makefile.inc +++ b/src/cpu/intel/model_f3x/Makefile.inc @@ -2,4 +2,4 @@ subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f3x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/0f-03-*) diff --git a/src/cpu/intel/model_f4x/Makefile.inc b/src/cpu/intel/model_f4x/Makefile.inc index 6fbc9ae..196d63e 100644 --- a/src/cpu/intel/model_f4x/Makefile.inc +++ b/src/cpu/intel/model_f4x/Makefile.inc @@ -2,4 +2,4 @@ subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f4x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/0f-04-*) diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 1fd1603..4fc16d5 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -177,10 +177,10 @@
ifeq ($(CONFIG_SOC_INTEL_GLK),y) # Gemini Lake B0 (706a1) only atm. -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_706ax/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-7a-*) else # Apollo Lake 506c2, B0 (506c9) and E0 (506ca) only atm. -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506cx/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-5c-*) endif
endif # if CONFIG_SOC_INTEL_APOLLOLAKE diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 1328944..239004b 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -91,9 +91,9 @@ endif
# Coffeelake U43e D0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-86-*) # Coffeelake H/S/E3 B0 U0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-96-*)
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc index 0a23170..e8a3189 100644 --- a/src/soc/intel/fsp_broadwell_de/Makefile.inc +++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc @@ -39,6 +39,6 @@ CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/fsp CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_5066x/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-56-*)
endif # ifeq ($(CONFIG_SOC_INTEL_FSP_BROADWELL_DE),y) diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index e9f555f..9237188 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -83,13 +83,13 @@
# Skylake D0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_406ex/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-4e-*) # Skylake H Q0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506ex/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-5e-*) # Kabylake H0, Y0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-8e-*) # Kabylake HB0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-9e-*) # Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) # since those are probably pre-release samples.