Marx Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38741 )
Change subject: soc/intel/cannonlake: Add tdc config for CML
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Patch Set 12:
(2 comments)
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38741/12//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/38741/12//COMMIT_MSG@16
PS12, Line 16: FSP log
How do you check that? Is that in the coreboot console output, for example `cbmem -1`?
It needs to add "USE=fw_debug", cros_workon/emerge intel_cmlfsp project and capture the serial log while the device is booting up. Since intel_cmlfsp is a private project, I think anyone who has the access right to intel_cmlfsp should know how to get FSP log. Anyway, I'll add more details about how to generate FSP log.
https://review.coreboot.org/c/coreboot/+/38741/12/src/soc/intel/cannonlake/i...
File src/soc/intel/cannonlake/include/soc/vr_config.h:
https://review.coreboot.org/c/coreboot/+/38741/12/src/soc/intel/cannonlake/i...
PS12, Line 58: *
Sorry, I missed your reply. This should be fixed in a follow-up.
ok. will follow the coding style.
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