Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5389
-gerrit
commit e51d92a7d053c2a4d28d4e940c4dc1348c6a4470 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Sun Mar 16 16:30:59 2014 +1100
mainboard/jetway/nf81-t56n-lf: Toggle GPIO, WDT, CIR in devicetree.cb.
Turn on WDT and GPIO support in the devicetree. Turn off CIR support. Dispense with old commentary.
Change-Id: I2173c0e454ddc0a30e023976bdf4764d951ea5f8 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/jetway/nf81-t56n-lf/devicetree.cb | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb index 574bb8a..8f453ef 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb +++ b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb @@ -88,11 +88,11 @@ chip northbridge/amd/agesa/family14/root_complex irq 0x70 = 1 # Keyboard IRQ irq 0x72 = 12 # Mouse IRQ end - device pnp 2e.06 off end # GPIO -# TODO: Verify BSEL register content with vendor BIOS using -# $ sudo isadump 0x4e 0x4f 0x7 -# which select logical device (LDN) 7. Then read that we have in 0x27, bit1 - device pnp 2e.07 off end # BSEL + device pnp 2e.06 on # GPIO + io 0x60 = 0xa00 + end + device pnp 2e.07 on end # WDT + device pnp 2e.08 off end # CIR device pnp 2e.0a on end # PME end # f71869ad end #LPC