Hello build bot (Jenkins), Shreesh Chhabbi, Ravishankar Sarawadi, Duncan Laurie, Nick Vaccaro, Dossym Nurmukhanov, Nick Vaccaro, Aamir Bohra, Aaron Durbin, Karthik Ramasubramanian, ron minnich, Ron Minnich,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41612
to look at the new patch set (#15).
Change subject: util: Add spd_tools to generate SPDs for TGL and JSL boards ......................................................................
util: Add spd_tools to generate SPDs for TGL and JSL boards
This change adds tools for generating SPD files for LPDDR4x memory used in memory down configurations on Intel Tiger Lake (TGL) and Jasper Lake (JSL) based platforms. These tools generate SPDs following JESD209-4C specification and Intel recommendations (doc #616599,
Two tools are provided: * gen_spd.go: Generates de-duplicated SPD files using a global memory part list provided by the mainboard in JSON format. Additionally, generates a SPD manifest file (in CSV format) with information about what memory part from the global list uses which of the generated SPD files.
* gen_part_id.go: Allocates DRAM strap IDs for different LPDDR4x memory parts used by the board. Takes as input list of memory parts used by the board (with one memory part on each line) and the SPD manifest file generated by gen_spd.go. Generates Makefile.inc for integrating the generated SPD files in the coreboot build.
BUG=b:155239397,b:147321551
Change-Id: Ia9b64d1d48371ccea1c01630a33a245d90f45214 Signed-off-by: Furquan Shaikh furquan@google.com --- A util/spd_tools/intel/lp4x/README.md A util/spd_tools/intel/lp4x/gen_part_id.go A util/spd_tools/intel/lp4x/gen_spd.go 3 files changed, 1,443 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/41612/15