Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52142 )
Change subject: soc/amd/common: Add PM_ESPI_INTR_CTRL ......................................................................
soc/amd/common: Add PM_ESPI_INTR_CTRL
This register is used for masking/unmasking eSPI IRQs.
BUG=none TEST=Build guybrush
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ia209539b2e0ce390e227757b16c2969b9124a845 --- M src/soc/amd/common/block/include/amdblocks/acpimmio.h 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/52142/1
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h index 9360650..9c007e7 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h @@ -26,6 +26,8 @@ #define LEGACY_DMA_IO_EN (1 << 2) #define CF9_IO_EN (1 << 1) #define LEGACY_IO_EN (1 << 0) +#define PM_ESPI_INTR_CTRL 0x40 +#define PM_ESPI_DEV_INTR_MASK 0x00FFFFFF #define PM_RST_CTRL1 0xbe #define SLPTYPE_CONTROL_EN (1 << 5) #define KBRSTEN (1 << 4)