[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add Cannonlake PCI id

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21691

Change subject: soc/intel/common: Add Cannonlake PCI id
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soc/intel/common: Add Cannonlake PCI id

Add extra pci ids of CNLU and CNLY into common code.

Change-Id: Ibbf3d500a780cc6a758fda1ddbec2b9953fb5a97
Signed-off-by: Lijian Zhao 
---
M src/soc/intel/common/block/lpc/lpc.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/21691/1

diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index da3188d..d425667 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -114,6 +114,8 @@
    PCI_DEVICE_ID_INTEL_KBP_LP_Y_PREMIUM,
    PCI_DEVICE_ID_INTEL_APL_LPC,
    PCI_DEVICE_ID_INTEL_GLK_LPC,
+	PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC,
+	PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC,
    PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC,
    0
 };