Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35233 )
Change subject: intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK ......................................................................
Patch Set 6:
More importantly; the way car.ld is laid out requires DCACHE_BSP_STACK_SIZE parameter to stay constant across bootblock, verstage and romstage. Updates to FSP-M will not be allowed to have increased requirement for the stack size on systems with read-only bootblock.
Yes, your analysis is right. It was the case even before FSP_USES_CB_STACK was enabled i.e. stack remaining the same across bootblock, verstage and romstage. But, it wasn't a problem because the stack was used only by coreboot and hence more predictable usage. However, I am sure we had other problems with FSP changing the stack pointer and using its own separate stack.
Yes, updates to FSP-M will not be allowed with read-only bootblock. But couple of things: a. Before the platform gets to a stable phase, I am hoping that the FSP changes stabilize and so the stack usage is more predictable (or well documented). b. Also, the current requirements seem to be for FSP with debug enabled. So, for in production systems, there should still be enough space for growth.
It might make sense to have a debug option to check how close FSP is to using up the stack, so that the resource allocation can be better handled by coreboot.