Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32076 )
Change subject: mb/protectli/vault: Add FW2B and FW4B boards support ......................................................................
Patch Set 14:
(5 comments)
https://review.coreboot.org/c/coreboot/+/32076/14/Documentation/mainboard/pr... File Documentation/mainboard/protectli/fw2b_fw4b.md:
https://review.coreboot.org/c/coreboot/+/32076/14/Documentation/mainboard/pr... PS14, Line 83: - mPCIe debug card connected to mSATA (mSATA slot has LPC signals routed, The LPC pinout has to match that of the debug card
https://review.coreboot.org/c/coreboot/+/32076/14/src/mainboard/protectli/va... File src/mainboard/protectli/vault_bsw/acpi_tables.c:
PS14: Uhm, aren't the SPDX headers much more succint?
https://review.coreboot.org/c/coreboot/+/32076/14/src/mainboard/protectli/va... PS14, Line 38: /* Disable USB ports in S5 */ : gnvs->s5u0 = 0; : gnvs->s5u1 = 0; : : /* Disable DPTF */ : gnvs->dpte = 0; But you just zeroed the whole thing a few lines ago?
https://review.coreboot.org/c/coreboot/+/32076/14/src/mainboard/protectli/va... File src/mainboard/protectli/vault_bsw/fadt.c:
https://review.coreboot.org/c/coreboot/+/32076/14/src/mainboard/protectli/va... PS14, Line 39: acpi_checksum((void *) fadt, header->length); Fits in one line
https://review.coreboot.org/c/coreboot/+/32076/14/src/mainboard/protectli/va... File src/mainboard/protectli/vault_bsw/variants/fw4b/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/32076/14/src/mainboard/protectli/va... PS14, Line 4: device pci 1c.2 on end # 8086 22cc - PCIe Root Port 3 What is connected to this port?