[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Move GPIO PM configuration to soc level

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37685 )

Change subject: soc/intel/cannonlake: Move GPIO PM configuration to soc level
......................................................................

Patch Set 14:

(1 comment)
> Patch Set 14:
>
> (1 comment)

https://review.coreboot.org/c/coreboot/+/37685/11/src/soc/intel/common/acpi/... 
File src/soc/intel/common/acpi/platform.asl:

https://review.coreboot.org/c/coreboot/+/37685/11/src/soc/intel/common/acpi/... 
PS11, Line 22: External(_SB.PCI0.EGPM, MethodObj)
> > Do we want let only "coreboot" configure the PM bit without FSP-S, right? If so, gpio_override_pm  […]

So, do we really need gpio_override_pm flag in coreboot? Anyway we will program it as no matter default(MISCCFG_ENABLE_GPIO_PM_CONFIG) or others. We can just leave this in device tree for all boards, so we don't care the FSP, right?