[coreboot-gerrit] Change in coreboot[master]: mb/bostentech: Add GBYT4 port

[Máté Kukri (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Angel Pons, Arthur Heymans,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43087

to look at the new patch set (#33).

Change subject: mb/bostentech: Add GBYT4 port
......................................................................

mb/bostentech: Add GBYT4 port

- Single channel DDR3L: requires mrc.bin (extracted from ChromeBook
    firmware)
    - Tested, working with: 2GB SK Hynix stick, 4GB Samsung stick
- VGA: Video works with VGA rom extracted from UEFI
    - SeaBIOS (runs the option rom) tested, works in text mode
    - GRUB2 (coreboot runs the option rom) tested, works in VESA mode,
    	no video in text mode
- USB: Both USB2.0 ports work using the EHCI controller
    - Works in both SeaBIOS, GRUB2 and Linux
- Serial: driven by an IT8728F SuperIO
    - Works as a console in coreboot, SeaBIOS and GRUB2
    - Works with interrupts in Linux after a cold boot, after a warm
    	reboot IRQs get lost
- SATA: 2 ports on board (one is mSATA)
    - SATA init works with both refcode.elf and native refcode
    	(patch CB:43133)
    - Booting from SATA works with GRUB2, SATA works in Linux
    - Patch CB:44088 fixes SATA in SeaBIOS
- 4 PCIe Intel ethernet controllers
    - Only tested in Linux, all 4 work with the igb driver
- Power button, reset button and both indicator LEDs work
- Optional fan header is not tested as the appliance is passively
    cooled
- TXE (ME): optional, does not shut down after 30 minutes without the
    TXE blob
    - Works with TXE blob left as is, shows up on PCI
    - Works with the entire TXE section wiped, no device on PCI,
    	intelmetool can't find anything

Used rambi as an example, but almost everything is modified as the two
    boards are very different.

Signed-off-by: Mate Kukri 
Change-Id: I99ed0c94c3255578151f940ad9b274e6f0816bfe
---
A src/mainboard/bostentech/Kconfig
A src/mainboard/bostentech/Kconfig.name
A src/mainboard/bostentech/gbyt4/Kconfig
A src/mainboard/bostentech/gbyt4/Kconfig.name
A src/mainboard/bostentech/gbyt4/Makefile.inc
A src/mainboard/bostentech/gbyt4/acpi/ec.asl
A src/mainboard/bostentech/gbyt4/acpi/mainboard.asl
A src/mainboard/bostentech/gbyt4/acpi/superio.asl
A src/mainboard/bostentech/gbyt4/acpi_tables.c
A src/mainboard/bostentech/gbyt4/board_info.txt
A src/mainboard/bostentech/gbyt4/cmos.layout
A src/mainboard/bostentech/gbyt4/devicetree.cb
A src/mainboard/bostentech/gbyt4/dsdt.asl
A src/mainboard/bostentech/gbyt4/early_init.c
A src/mainboard/bostentech/gbyt4/gpio.c
A src/mainboard/bostentech/gbyt4/irqroute.c
A src/mainboard/bostentech/gbyt4/irqroute.h
A src/mainboard/bostentech/gbyt4/mainboard.c
A src/mainboard/bostentech/gbyt4/romstage.c
19 files changed, 674 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/43087/33