1 May
2020
1 May
'20
8:09 a.m.
David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40842 )
Change subject: soc/intel/denverton_ns: Fix 16-bit read/write PCI_COMMAND register ......................................................................
Patch Set 2: Code-Review+1
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I23ca0c50b0b3c71710173b84d98c2e170ed3e45b
Gerrit-Change-Number: 40842
Gerrit-PatchSet: 2
Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr
Gerrit-Reviewer: David Guckian
Gerrit-Reviewer: David Guckian david.guckian@intel.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Vanessa Eusebio vanessa.f.eusebio@intel.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Fri, 01 May 2020 14:09:25 +0000
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