Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45337 )
Change subject: soc/intel: Make use of common reset code block ......................................................................
Patch Set 11:
(4 comments)
https://review.coreboot.org/c/coreboot/+/45337/10/src/soc/intel/common/Makef... File src/soc/intel/common/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/45337/10/src/soc/intel/common/Makef... PS10, Line 32: postcar
fsp_reset.c is really required only in romstage and ramstage. […]
Ack
https://review.coreboot.org/c/coreboot/+/45337/10/src/soc/intel/common/fsp_r... File src/soc/intel/common/fsp_reset.c:
https://review.coreboot.org/c/coreboot/+/45337/10/src/soc/intel/common/fsp_r... PS10, Line 3: #include <cf9_reset.h>
Not required?
Ack
https://review.coreboot.org/c/coreboot/+/45337/10/src/soc/intel/common/fsp_r... PS10, Line 11: */
Probably add a #error here if FSP_STATUS_GLOBAL_RESET is not defined so that the user knows what nee […]
Ack
https://review.coreboot.org/c/coreboot/+/45337/10/src/soc/intel/common/fsp_r... PS10, Line 22:
Reorganize as: […]
Ack