[coreboot-gerrit] Change in coreboot[master]: mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in q...

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35246 )

Change subject: mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.
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Patch Set 3: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/35246/3/src/mainboard/emulation/spi... 
File src/mainboard/emulation/spike-riscv/clint.c:

https://review.coreboot.org/c/coreboot/+/35246/3/src/mainboard/emulation/spi... 
PS3, Line 31: 	write32((void *)(SPIKE_CLINT_BASE + 4 * (uintptr_t)hartid), !!val);
the uintptr_t confused me, is it necessary?