Hello Tim Wawrzynczak, Shelley Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33456
to look at the new patch set (#2).
Change subject: mb/google/hatch/variants/helios: Use LPDDR3 memory ......................................................................
mb/google/hatch/variants/helios: Use LPDDR3 memory
Change the SPD makefile to use the LPDDR3 SPDs. Set up the arrays for mapping SoC DQS pins to LPDDR3 pins.
BRANCH=none BUG=b:133455595 TEST=`FEATURES="noclean" FW_NAME="helios" emerge-hatch chromeos-ec depthcharge vboot_reference libpayload coreboot-private-files intel-cmlfsp coreboot-private-files-hatch coreboot chromeos-bootimage` Ensure the firmware builds without error.
Change-Id: Iebaba2ec65dfcf36674b4733b421ada107b22b09 Signed-off-by: Paul Fagerburg pfagerburg@chromium.org --- M src/mainboard/google/hatch/variants/helios/Makefile.inc A src/mainboard/google/hatch/variants/helios/memory.c 2 files changed, 72 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/33456/2