Venkata Krishna Nimmagadda has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41800 )
Change subject: soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntax ......................................................................
soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntax
This change updates gpio_op.asl to use ASL2.0 syntax. This increases the readability of the ASL code.
BUG=none BRANCH=none TEST="BUILD for Volteer"
Signed-off-by: Venkata Krishna Nimmagadda venkata.krishna.nimmagadda@intel.com Change-Id: Ib54b3f7da828ce8d232fcea0639077970638f610 --- M src/soc/intel/tigerlake/acpi/gpio_op.asl 1 file changed, 16 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/41800/1
diff --git a/src/soc/intel/tigerlake/acpi/gpio_op.asl b/src/soc/intel/tigerlake/acpi/gpio_op.asl index 16e7690..1ba47cd 100644 --- a/src/soc/intel/tigerlake/acpi/gpio_op.asl +++ b/src/soc/intel/tigerlake/acpi/gpio_op.asl @@ -11,7 +11,7 @@ { VAL0, 32 } - And (PAD_CFG0_RX_STATE, ShiftRight (VAL0, PAD_CFG0_RX_STATE_BIT), Local0) + Local0 = PAD_CFG0_RX_STATE & (VAL0 >> PAD_CFG0_RX_STATE_BIT)
Return (Local0) } @@ -27,7 +27,7 @@ { VAL0, 32 } - And (PAD_CFG0_TX_STATE, VAL0, Local0) + Local0 = PAD_CFG0_TX_STATE & VAL0
Return (Local0) } @@ -43,7 +43,7 @@ { VAL0, 32 } - Or (PAD_CFG0_TX_STATE, VAL0, VAL0) + VAL0 = PAD_CFG0_TX_STATE | VAL0 }
/* @@ -57,7 +57,7 @@ { VAL0, 32 } - And (Not (PAD_CFG0_TX_STATE), VAL0, VAL0) + VAL0 = ~PAD_CFG0_TX_STATE & VAL0 }
/* @@ -76,10 +76,10 @@ { VAL0, 32 } - Store (VAL0, Local0) - And (Not (PAD_CFG0_MODE_MASK), Local0, Local0) - And (ShiftLeft (Arg1, PAD_CFG0_MODE_SHIFT, Arg1), PAD_CFG0_MODE_MASK, Arg1) - Or (Local0, Arg1, VAL0) + Local0 = VAL0 + Local0 = ~PAD_CFG0_MODE_MASK & Local0 + Arg1 = (Arg1 >> PAD_CFG0_MODE_SHIFT) & PAD_CFG0_MODE_MASK + VAL0 = Local0 | Arg1 }
/* @@ -97,10 +97,10 @@ VAL0, 32 }
- If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_TX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_TX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_TX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_TX_DISABLE | VAL0 } }
@@ -119,9 +119,9 @@ VAL0, 32 }
- If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_RX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_RX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_RX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_RX_DISABLE | VAL0 } }