Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36534 )
Change subject: drivers/pc80: Remove UDELAY_TIMER2 ......................................................................
drivers/pc80: Remove UDELAY_TIMER2
Change-Id: Ibc0a5f6e7be78be15f56b252be45a288b925183a Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/drivers/pc80/pc/Kconfig M src/drivers/pc80/pc/i8254.c 2 files changed, 0 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/36534/1
diff --git a/src/drivers/pc80/pc/Kconfig b/src/drivers/pc80/pc/Kconfig index 06e6568..6813857 100644 --- a/src/drivers/pc80/pc/Kconfig +++ b/src/drivers/pc80/pc/Kconfig @@ -18,9 +18,4 @@ this option, then you can say N here to speed up boot time. Otherwise say Y.
-# This option is used in code but never selected. -config UDELAY_TIMER2 - bool - default n - endif diff --git a/src/drivers/pc80/pc/i8254.c b/src/drivers/pc80/pc/i8254.c index 654f84a..5090f0c 100644 --- a/src/drivers/pc80/pc/i8254.c +++ b/src/drivers/pc80/pc/i8254.c @@ -32,24 +32,6 @@ outb(0x12, TIMER1_PORT); }
-#if CONFIG(UDELAY_TIMER2) -static void load_timer2(unsigned int ticks) -{ - /* Set up the timer gate, turn off the speaker */ - outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB); - outb(TIMER2_SEL | WORD_ACCESS | MODE0 | BINARY_COUNT, TIMER_MODE_PORT); - outb(ticks & 0xFF, TIMER2_PORT); - outb(ticks >> 8, TIMER2_PORT); -} - -void udelay(int usecs) -{ - load_timer2((usecs * TICKS_PER_MS) / 1000); - while ((inb(PPC_PORTB) & PPCB_T2OUT) == 0) - ; -} -#endif - #define CLOCK_TICK_RATE 1193180U /* Underlying HZ */
/* ------ Calibrate the TSC -------