Morgan Jang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46068 )
Change subject: arch/x86/smbios: Populate SMBIOS type 7 with cache information
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Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46068/8//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/46068/8//COMMIT_MSG@11
PS8, Line 11: L1 Instruction cache size, and multiply the cache size of L1 and L2
: by the number of cores
I know that but get_number_of_caches() seems rather complex with many cases. […]
I refered to the section of cache information in Intel BWG.
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